DMA
A hardware mechanism that transfers data between peripherals and memory with limited CPU involvement, often using descriptors and interrupt completion.
Data Movement
DMA allows a peripheral or controller to move blocks of data to or from memory without requiring the CPU to copy every byte. The CPU typically configures addresses, lengths and direction, then handles completion or error notification.
This reduces per-byte CPU overhead but introduces ownership and synchronization concerns around the shared buffers.
Cache and Ordering
On some architectures, cache coherence is not automatic for every DMA path. Drivers may need explicit cache maintenance or memory barriers before handing a buffer between CPU and device.
Interrupt rate can also be reduced through batching or descriptor rings.
Related Embedded-Systems Concepts
Source
- https://docs.kernel.org/6.8/core-api/dma-api-howto.html